Remarkable charge-trapping efficiency of the memory device with (TiO2)0.8(Al2O3)0.1 composite charge-storage dielectric

Abstract

A memory device p-Si/SiO2/(TiO2)0.8(Al2O3)0.1(TAO-81)/Al2O3/Pt was fabricated, in which a composite of two high-k dielectrics with a thickness of 1 nm was employed as the charge-trapping layer to enhance the charge-trapping efficiency of the memory device. At an applied gate voltage of ±9 V, TAO-81 memory device shows a memory window of 8.83 V in its C-V curve. It also shows a fast response to a short voltage pulse of 10−5 s. The charge-trapping capability, the endurance, and retention characteristics of TAO-81 memory device can be improved by introducing double TAO-81 charge-trapping layers intercalated by an Al2O3 layer. The charge-trapping mechanism in the memory device is mainly ascribed to the generation of the electron-occupied defect level in the band gap of Al2O3 induced by the inter-diffusion between TiO2 and Al2O3.