Finding the best FPGA implementation of the DES algorithm to secure smart cards

Abstract

Smart cards are often used in different applications which require strong security protection and authentication; such as corporate organization, government, banks etc. its popularity is increasing due to its price and safety. Several cryptographic algorithms have been implemented to smart cards among them we find the DES (Data Encryption Standard). In this paper we propose to compare and find the best FPGA (Field Programmable Gate Arrays) implementation of the DES Algorithm to secure smart cards. Knowing that, smart cards occupy small chip area; consume low power, so their applications demand security hardware with more restrictions on area and power and less on throughput. These results can be helpful for selecting the right FPGA implementation of DES for a dedicated application. Results are considered under different FPGA, languages, and pipelined and non-pipelined implementations.