A surface code quantum computer in silicon

TLDR

Phosphorus donor nuclear spin qubits in silicon offer exceptionally long coherence times and scalable nano‑electronics, yet the high threshold of topological quantum error correction demands a synchronous two‑dimensional array, creating significant fabrication and control challenges. The authors propose a shared‑control architecture that overcomes these challenges by exploiting the natural uniformity of donor qubits and electronic confinement. Their design places a two‑dimensional donor lattice between two vertically separated control layers forming a perpendicular crisscross gate array, with shared lines that load/unload single electrons to activate multiple qubits in parallel and enable global spin control for surface‑code operations. This approach eliminates the need for independent qubit control, wave‑function engineering, and ad hoc interconnects, and, with demonstrated fabrication elements and simulated operations below the surface‑code threshold, offers a viable route to large‑scale quantum processing in silicon and other uniform qubit systems.

Abstract

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.