A Dynamic Power-Aware Scheduling of Mixed-Criticality Real-Time Systems

Abstract

Recent safety-critical real-time embedded systems have enabled multiple real-time applications with different criticalities to run in a single system. Thus, many studies have been done not only on providing timing guarantee for tasks having different criticality levels, but also on other required functional properties such as energy reduction. Since many processors are equipped with dynamic voltage and frequency scaling (DVFS) capacity, energy can be saved by reducing the processor frequency. In this paper, we provide a new dynamic power-aware mixed-criticality real-time scheduling. The proposed scheme can reduce energy more by using slack time for reserved time for high-criticality tasks. Throughout simulation results, we show that the proposed scheme reduces more energy and that the optimal frequency levels in the static scheme are not optimal in the dynamic scheme.