IEEE Journal of Solid-State Circuits · 1996 · 11 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsVlsi DesignAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDistortion AnalysisDynamic Power ReductionMixed-signal Integrated Circuit DesignAnalog Circuit DesignAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital ConvertersCmos Analog Circuit DesignCmos Analog Integrated CircuitsDynamic RangeTotal Harmonic Distortion
The area ratio of analog to digital for mixed-mode chip has been inversely proportional to the process design rule for a given dynamic range objective, in contradiction to the LSI trend. This paper presents a design approach to realize a high degree of size reduction with process design rules for analog circuitry and a signal processing architecture for digital circuitry. A five-level current-mode /spl Sigma//spl Delta/ digital-to-analog converter (DAC) system reveals full scale total harmonic: distortion plus noise (THD+N) of -90 dB and dynamic-range of 100 dB at 3 V (low power of 22 mW). Analog-area down-scaling can be accomplished by this architecture to be 1.09 mm/sup 2/, using 0.6-/spl mu/m double-poly double-metal (DPDM) CMOS. For the digital filter, a pipeline instruction sequence with multiplierless architecture also gives small area of 1.98 mm/sup 2/.
8
B. Agrawal, K. Shenoi · IRE Transactions on Communications Systems · 1983 · 131 citations
A CMOS stereo 16-bit D/A converter for digital audio
P.J.A. Naus, E.C. Dijkmans, E. Stikvoort et al. · IEEE Journal of Solid-State Circuits · 1987 · 116 citations
Engineering, Computer Engineering, Electrical Engineering +17