A 320-GHz 1<formula formulatype="inline"><tex Notation="TeX">$\times$</tex></formula>4 Fully Integrated Phased Array Transmitter Using 0.13-<formula formulatype="inline"><tex Notation="TeX">$\mu$</tex></formula>m SiGe BiCMOS Technology

Xiao-Dong Deng, Yihu Li, Jiankang Li, Chao Liu, Wen Wu, Yong‐Zhong Xiong

IEEE Transactions on Terahertz Science and Technology · 2015 · 50 citations · 17 references

Concepts

Abstract

This paper presents a 320-GHz 1 ×4 fully integrated phased array transmitter using 0.13- μm SiGe BiCMOS technology. The 1 ×4 array transmitter is aiming for terahertz wireless communication and is based on RF beam forming architecture. By integrating a 20-GHz phase-locked-loop (PLL) frequency synthesizer, an 80-GHz quadrupler, a 1:4 Wilkinson power divider network, four-way 80-GHz tunable attenuators, amplifiers, analog phase shifters, 320-GHz frequency quadruplers/modulators, and on-chip antenna arrays, the transmitter chip achieves a maximal EIRP of 10.6 dBm at 320 GHz with the 3-dB bandwidth of 20 GHz, and ± 12 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> beam scanning range is obtained. The dc consumption of the whole chip is ~ 1000 mW and the total chip size is 8 × 4.3 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

References

17