Energy‐efficient hybrid capacitor switching scheme for SAR ADC

Abstract

A novel low‐energy hybrid capacitor switching scheme for a low‐power successive approximation register (SAR) analogue‐to‐digital converter (ADC) is presented. The proposed switching scheme combines a new switch method and the monotonic technique. The new switch method can achieve no switching energy consumption in the first three comparison cycles. Furthermore, a low‐energy monotonic procedure is performed for the rest of the comparisons. The average switching energy is reduced by 98.83% compared with the conventional architecture, resulting in the most energy‐efficient switching scheme among the existing switching techniques. Besides the significant energy saving, the proposed switching scheme also achieves a 75% reduction of the capacitors over the conventional scheme.