A Broadband High Efficiency High Output Power Frequency Doubler

Abstract

An 8 to 30 GHz broadband high efficiency, high output power frequency doubler using 0.5 ¿m AlGaAs/InGaAs enhancement-mode pseudomorphic high electronic mobility transistor process is presented in this paper. A common-gate/common-source field effect transistor pair is employed in the balanced doubler. With an input power of 8 dBm, this work features a conversion gain of better than -4 dB with a fundamental rejection of better than 13 dB over the operation bandwidth. The output 1 dB compression point (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1B</sub> ) and the saturation output power (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> ) are higher than 7.3 and 10 dBm, respectively. This work presents the highest figure-of-merit (FOM) of 25.14 as compared to other previously reported broadband doublers.