Parametric thermal modeling of 3D stacked chip electronics with interleaved solid heat spreaders

Abstract

Effective methods must be devised to transfer the heat from the core of 3D stacked chip electronics to the exterior of the device. The use of solid heat spreaders of high thermal conductivity interleaved between the chips was investigated parametrically through computational modeling. The effect of the power dissipated, the applied heat transfer coefficient, the spreader thickness, spreader thermal conductivity, and the shape of via holes in the spreader were modeled. Results show that for moderate power dissipations, 5 W in each 27 times 38 mm layer, a 250 mum thick copper heat spreader would conduct heat adequately