Publication | Open Access
Inexpensive implementations of set-associativity
101
Citations
20
References
1989
Year
Unknown Venue
EngineeringWide Tag MemoryType TheoryComputer ArchitectureArchitectural SupportInexpensive ImplementationsHardware SecurityHigh-performance ArchitectureWide Set-associativityParallel ComputingWeb CacheProgramming Language TheoryCache DesignsAbstract InterpretationComputer EngineeringCachingComputer ScienceExternal-memory AlgorithmAutomated ReasoningProgram AnalysisFormal MethodsParallel ProgrammingSystem Software
The traditional approach to implementing wide set-associativity is expensive, requiring a wide tag memory (directory) and many comparators. Here we examine alternative implementations of associativity that use hardware similar to that used to implement a direct-mapped cache. One approach scans tags serially from most-recently used to least-recently used. Another uses a partial compare of a few bits from each tag to reduce the number of tags that must be examined serially. The drawback of both approaches is that they increase cache access time by a factor of two or more over the traditional implementation of set-associativity, making them inappropriate for cache designs in which a fast access time is crucial (e.g. level one caches, caches directly servicing processor requests).
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