IEEE Journal of Solid-State Circuits · 2007 · 21 citations · 9 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureComputer VisionEmbedded SystemsDigital Image ProcessingEnergy-efficient Embedded SystemsFace RecognitionHardware AccelerationImage ProcessingTemplate MatchingEmbedded Vision SystemsFace Feature ExtractionFast Template MatchingGenetic Algorithm OptimizationImage Processing UnitsSteady-state Genetic AlgorithmsTemplate-based Face RecognitionTemplate-based Matching
A 0.79-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> 29-mW real-time face detection core is fabricated in a 0.13-mum CMOS technology. It consists of 75-kgate logic, 58-kbit SRAM, and an ARM AMBA bus interface. Comprehensive optimization in both algorithm and hardware design improves performance and reduces area and power dissipation. Two kinds of templates with facial features are proposed to achieve high speed and yet accurate face detection. A Steady State Genetic Algorithm is employed for high-speed hardware implementation of template matching. To reduce area and power dissipation, frame memory is optimized at minimum and the detection engine is shared for two kinds of template matching. The core can detect eight faces in each frame of moving pictures at 30 frames/second. Face detection accuracy is 92%
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Robust Real-Time Face Detection
Paul Viola, Michael Jones · International Journal of Computer Vision · 2004 · 14.2K citations
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