A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects

Abstract

A low-swing transceiver for 10mm-long 0.54mum-wide on-chip interconnects is presented. A capacitive pre-emphasis transmitter lowers the power and increases the bandwidth. The receiver uses DFE with a power-efficient continuous-time feedback filter. The transceiver, fabricated in 1.2V 90nm CMOS, achieves 2Gb/s. It consumes 0.28pJ/b, which is 7times lower than earlier work