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A highly efficient CMOS line driver with 80-dB linearity for ISDN U-interface applications

16

Citations

11

References

1992

Year

Abstract

A fully differential CMOS line driver intended for ISDN U-interface applications is reported. Design details with emphasis on a novel high-swing output stage are presented. The output stage incorporates a class-B stage in parallel with the conventional class-H/B structure, allowing high linearity, high power efficiency, and well-controlled quiescent current. The prototype line driver exhibits total harmonic distortion of -83 dB for an output voltage swing of 7 V/sub pp-diff/. It maintains linearity on the order of 78 dB for nearly rail-to-rail output voltage swing of 9 V/sub pp-diff/ for signal frequencies of up to 40 kHz. The chip, built in a 0.9- mu m technology, occupies an active area of 0.63 mm/sup 2/. It operates from a single 5-V power supply and dissipates 20-mW quiescent power.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

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