A compact tunable CMOS transconductor with high linearity

M. Kachare, Antonio J. López‐Martín, J. Ramı́rez-Angulo, R.G. Carvajal

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2005 · 39 citations · 7 references

Concepts

Abstract

A novel CMOS linear transconductor is presented. The use of simple and accurate voltage buffers to drive two MOS transistors operating in the triode region leads to a highly linear voltage-to-current conversion. Transconductance gain can be continuously and precisely adjusted using dc level shifters. Measurement results of a balanced transconductor fabricated in a 0.5-/spl mu/m CMOS technology show a total harmonic distortion of -54 dB at 100 kHz for an 80-/spl mu/A peak-to-peak output, using a supply voltage of 2 V. It requires 0.07-mm/sup 2/ of silicon (Si) area and features 0.96 mW of static power consumption.

References

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