An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory

Abstract

Massive data transfer encountered in emerging multimedia
\nembedded applications requires architecture allowing both highly
\ndistributed memory structure and multiprocessor computation to be
\nhandled. The key issue that needs to be solved is then how to
\nmanage data transfers between large numbers of distributed
\nmemories. To overcome this issue, our paper proposes a scalable
\nDistributed Memory Server (DMS) for multiprocessor SoC
\n(MPSoC). The proposed DMS is composed of: (1) highperformance
\nand flexible memory service access points (MSAPs),
\nwhich execute data transfers without intervention of the processing
\nelements, (2) data network, and (3) control network. It can handle
\ndirect massive data transfer between the distributed memories of
\nan MPSoC. The scalability and flexibility of the proposed DMS
\nare illustrated through the implementation of an MPEG4 video
\nencoder for QCIF and CIF formats. The experiments show clearly
\nhow DMS can be adapted to accommodate different SoC
\nconfigurations requiring various data transfer bandwidths.
\nSynthesis results show that bandwidth can scale up to 28.8 GB/sec.