Hobbit: a high-performance, low-power microprocessor

Abstract

The class of portable hybrid computer/communication devices called personal communicators requires a microprocessor that simultaneously maximizes performance and minimizes power dissipation and silicon real estate. AT&T's 92010 Hobbit microprocessor combines reduced instruction set computer (RISC) architectural features, some non-RISC features, and an innovative electrical implementation to exactly target the personal communicator application. The authors give an overview of the Hobbit architecture and implementation, and demonstrate how the design achieved superior performance and low power. At 20 MHz, the performance of Hobbit is 13.5 VAX MIPS and 27000 Dhrystones/s, with only 250 mW of power at 3.3 V and 900 mW at 5.0 V. The performance/power ratio of 54 VAX MIPS/W is significantly superior to that of conventional RISC and CISC microprocessors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>