A Low-Power CMOS Voltage Reference Circuit Based On Subthreshold Operation

Abstract

A low power CMOS Voltage Reference Circuit was designed and implemented by TSMC 0.18-μm CMOS process. The voltage reference circuit uses the V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> difference between two MOSFETs operating in the weak-inversion region to generate the voltage with positive temperature coefficient. The reference voltage can be obtained by combining the weighted V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> difference with weak-inversion V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> voltage, which has a negative temperature coefficient. This circuit provides a nominal reference voltage of 621 mV, a temperature coefficient of 11.5 ppm/°C in [-20°C~120°C] from a 1.5V supply voltage. The line regulation of the reference voltage is 6 mV/V when the supply voltage is increased from 1.5V to 3V. The chip area is 0.132 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and dissipates 17.25 μW at room temperature. By connecting a 0.22 μF loading capacitor, the measured noise density at 100 Hz and 100 kHz is 0.14 μV/ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">√</i> Hz and 22.2 μV/ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">√</i> Hz, respectively.