A 1-V, 10-MHz clock-rate, 13-bit CMOS ΔΣ modulator using unity-gain-reset opamps

Abstract

Abstract—The problem of low-voltage operation of switched-capacitor circuits is discussed, and several solutions based on using unity-gain-reset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can be clocked at a high rate. A low-voltage 16 modulator, incorporating pseudodifferential unity-gain-reset opamps, is described. A test chip, realized in a 0.35- m CMOS process and clocked at 10.24 MHz, provided a dynamic range of 80 dB and a signal-to-noise C distortion (SNDR) ratio of 78 dB for a 20-kHz signal bandwidth, and a dynamic range of 74 dB and SNDR of 70 dB for a 50-kHz bandwidth, with a 1-V supply voltage. Index Terms—ADC, charge-pump circuits, delta–sigma, low voltage, sigma–delta, switched-capacitor circuits, switched opamp. I.