Flip chip die cracking - a simplified approach utilizing experimentation and simulations

Abstract

Flip chip assemblies are widely used in the electronics industry, in a range of electronic systems from low-end consumer products to high performance automotive controllers. However, residual stresses of a high magnitude are present in the structure due to differential thermal contraction rates of the various members of the assembly. This can lead to the problem of flip chip die cracking during manufacture or service, particularly if the exposed surface of the die is scratched or damaged. The need to easily predict die cracking potential in flip chip assemblies is therefore of considerable interest to the industry, especially for automotive electronics applications where the reliability requirements coupled with the field environment create a need for highly robust products. In this investigation, the problem of flip chip die cracking is approached from an industry perspective from two separate angles. The first involves the determination of the intrinsic strength of production-intent flip chip die using bend testing. The second angle involves the determination of stress levels in flip chip assemblies during manufacture and service using simulations. By comparing die strength with induced stresses, the potential for die cracking can be readily evaluated. Moreover, the impact of damage on the die surface can be quantified and the damage tolerance in a given design can be estimated.