2006 · 25 citations · 9 references
Electronic System LevelEngineeringRtl CodeEmbedded Software OptimizationComputer ArchitectureSoftware EngineeringSystem-level DesignEmbedded SystemsEmbedded ArchitectureSoftware AnalysisHardware VirtualizationSystems EngineeringParallel ComputingPerformance EngineeringVirtual PlatformComputer EngineeringSoftware SimulationComputer ScienceSoftware DesignEmbedded Operating SystemPlatform-based DesignProgram AnalysisSoftware TestingPerformance PortabilitySystem SoftwareVirtual Machine
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case study of creating and applying the ViP in the development of a new hard disk system called Hybrid-HDD that is one of the main features in the Windows VISTA (R). First, we summarize how we developed the ViP including the levels of timing accuracy of models, automatic generation of models from RTL code, external subsystem models, etc. Then, we explain how we exploited the ViP in software optimization. Compared with the conventional flow of software development, e.g. based on the real board, the ViP gives a better profiling capability thereby allowing designers to find more chances of code optimization. Based on the simulation and analysis with the ViP, the software optimization could improve system performance by more than 50%. However, in our case study, we found that the current ViP technique needs further improvements to become a true ESL design technique.
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Hardware/software co-simulation
Kurt Keutzer · 1994 · 217 citations · Full text
Sungjoo Yoo, I. Bacivarov, A. Bouchhima et al. · 2003 Design, Automation and Test in Europe Conference and Exhibition · 2003 · 40 citations
Engineering, Computer Architecture, Software Engineering +18