A 13.5-b 1.2-V micropower extended counting A/D converter

Abstract

This work presents a study of the extended counting technique for a 1.2-V micropower voice-band A/D converter. This extended counting technique is a blend of /spl Sigma//spl Delta/ modulation with its high resolution but relatively low speed and algorithmic conversion with its higher speed but lower accuracy. To achieve this, the converter successively operates first as a first-order /spl Sigma//spl Delta/ modulator to convert the most significant bits, and then the same hardware is used as an algorithmic converter to convert the remaining least significant bits. An experimental prototype was designed in 0.8-/spl mu/m CMOS. With a 1.2-V power supply, it consumes 150 /spl mu/W of power at a 16-kHz Nyquist sampling frequency. The measured peak S/(N+THD) was 80 dB and the dynamic range 82 dB. The converter core including the controller and all reconstruction logic occupies about 1.3/spl times/1 mm/sup 2/ of chip area. This is considerably less than a complete /spl Sigma//spl Delta/ modulation A/D converter where the digital decimation filter would occupy a significant amount of chip area.