On microprocessor error behavior modeling

Abstract

A microprocessor error behavior function (EBF) is introduced, mapping faults into errors on the functional level. The errors are obtained using a functional model of the processor. By applying the EBF to a fault and instruction distribution, it is possible to obtain the corresponding error distribution. A case study is described, in which (i) the EBFs for simulated bit-flip and pin-level faults are designed and used to compare the bit-flip and pin-level fault models, and (ii) the obtained error distribution for the bit-flip faults is used in an error injection experiment on the functional level to emulate these faults. For the processor used in the case study, it was found that only 9-12% of the bit-flip faults could be emulated using pin-level faults, while a tentative evaluation of the possibility to emulate bit-flip faults with software-implemented fault injection showed that 98-99% could be emulated. Finally, the results of the emulated bit-flip errors corresponded well to the real results obtained using bit-flip faults, thus indicating that the injected errors are good approximations of the faults.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>