Design and characterization of low-voltage analog switch without the need for clock boosting

Abstract

This paper deals with design and characterization techniques of a low-voltage CMOS analog switch to be used in sample-data circuits. Hspice simulation-based simple design procedure and a characterization method are presented. The switch on-resistance, the error voltage caused by charge injection and clock feedthrough as well as non-linear distortion simulation approaches are proposed. The procedure has been applied to the design of a CMOS transmission gate operating at a 10 MHz clock signal under a 1.8 V supply voltage in a 0.18 /spl mu/m digital CMOS process. The proposed method is suited for a pencil-and-paper design. Its accuracy is limited only by the numerical accuracy of Hspice.