EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyHigh-frequency Semiconductor DevicesLow-noise Circuit DesignNoise In Analog CircuitsRadio-frequency Integrated CircuitsCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos OscillatorsCmos Radio-frequency CircuitsFine-tuningLow-noise DesignLow-phase-noise OscillatorsRadio-frequency Integrated Circuit Design
This paper presents a 1.7 GHz CMOS VCO with low-noise regulator which is implemented in a 0.25 /spl mu/m 5M process for zero-IF cellular CDMA receivers. A grounded varactor topology, using the junction diodes of an NFET transistor, is employed for fine tuning. The VCO has 350 MHz tuning range and achieves phase noise <-134 dBc/Hz at 900 kHz offset under a noisy supply (0.37 pV//spl radic/Hz PSD). The DC power sensitivity is smaller than 25 kHz/V.
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