Temperature-aware microarchitecture

TLDR

With power density and cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor‑level techniques that can regulate operating temperature when the package’s capacity is exceeded. The study aims to evaluate runtime thermal regulation techniques by developing a practical thermal model and introducing effective dynamic thermal management methods such as temperature‑tracking frequency scaling, localized toggling, and computation migration. HotSpot is an accurate yet fast thermal model based on an equivalent circuit of thermal resistances and capacitances mapped to microarchitecture blocks and thermal package aspects, validated against finite‑element simulation. The model reveals that power metrics poorly predict temperature and that sensor imprecision significantly degrades DTM performance.

Abstract

With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques that can regulate operating temperature when the package's capacity is exceeded. Evaluating such techniques, however, requires a thermal model that is practical for architectural studies.This paper describes HotSpot, an accurate yet fast model based on an equivalent circuit of thermal resistances and capacitances that correspond to microarchitecture blocks and essential aspects of the thermal package. Validation was performed using finite-element simulation. The paper also introduces several effective methods for dynamic thermal management (DTM): "temperature-tracking" frequency scaling, localized toggling, and migrating computation to spare hardware units. Modeling temperature at the microarchitecture level also shows that power metrics are poor predictors of temperature, and that sensor imprecision has a substantial impact on the performance of DTM.