An Ultra-Wideband Impulse-Radio Transceiver Chipset Using Synchronized-OOK Modulation

Abstract

This work presents a low-complexity IR-UWB chipset which achieves synchronization and demodulation at the receiver relying only on a ring oscillator clock. The modulation scheme used, synchronized-OOK (S-OOK), permits low power timing acquisition and data reception with a static CMOS digital synchronizer and demodulator counting 61 logic elements. The receiver consists of a modified energy detector (ED) that allows to asynchronously receive UWB pulses in presence of narrowband interference (NBI) with power levels up to <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${-}$</tex></formula> 5 and <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${-}$</tex></formula> 16 dBm for 5.4 and 2.4 GHz continuous wave interfering signals respectively. The sensitivity is <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${-}$</tex></formula> 60/ <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${-}$</tex></formula> 66 dBm with an overall energy dissipation of 2.9/3.9 nJ/bit for a 1 Mbps S-OOK PRBS data stream and a 100% power duty cycle. The complete demodulation and synchronization digital back-end consumes only 0.2 mW (including on-chip output buffers) during normal operation. The IR-UWB transmitter is based on a gated LC oscillator and achieves pulse durations of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\sim} $</tex></formula> 2 ns for bandwidths of 500 MHz. It consumes 249 pJ/bit energy per bit at 1 Mbps OOK.