hthreads: A Hardware/Software Co-Designed Multithreaded RTOS Kernel

Abstract

This paper describes the hardware/software co-design of a multithreaded RTOS kernel on a new Xilinx Virtex II Pro FPGA. Our multithreaded RTOS kernel is an integral part of our hybrid thread programming model being developed for hybrid systems which are comprised of both software resident and hardware resident concurrently executing threads. Additionally, we provide new interrupt semantics by migrating uncontrollable asynchronous interrupt invocations into controllable, priority based thread scheduling requests. Performance tests verify our hardware/software codesign approach provides significantly tighter bounds on scheduling precision and significant jitter reduction when compared to traditionally implemented RTOS kernels. It also eliminates the jitter associated with asynchronous interrupt invocations.