Analysis and design of a 200W LDMOS based doherty amplifier for 3G base stations

Abstract

In this paper the analysis and design of a 200 W classical Doherty amplifier is described using discrete LDMOS devices. The peak (class-C) and main (class-AB) amplifiers are designed with two stages to obtain flat AM-AM and AM-PM characteristics for the Doherty amplifier. An asymmetrical planar coupler structure is utilized as an input splitter and microstrip based elements are used for phase matching and power combining at the output. This Doherty PA has a measured P1 dB of 53 dBm and exhibits an efficiency of 34% at 6 dB backoff (47 dBm) for two-carrier WCDMA. The ACPR and IM3 obtained at 47 dBm are 37 dBc and 33 dBc respectively. The gain at 6 dB backoff is 22 dB over the frequency range 2.11-2.17 GHz. Design considerations for a Doherty amplifier based on discrete LDMOS devices are addressed.