Publication | Closed Access
A simple high-speed low current comparator
30
Citations
9
References
2002
Year
Unknown Venue
Low-power ElectronicsElectrical EngineeringLow Input ImpedanceEngineeringComputer EngineeringPropagation DelaySimple Biasing MethodDigital Circuit DesignInstrumentationPower ElectronicsMicroelectronicsAnalog-to-digital Converter
A high-speed low current comparator with low input impedance using a simple biasing method is proposed. Simulation results demonstrate the propagation delay is about 2.8 nsec and the average power consumption is 0.58 mW for 0.1 /spl mu/A input current at supply voltage of 3 V using 0.35 /spl mu/m CMOS technology.
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