Publication | Closed Access
Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent
15
Citations
2
References
2010
Year
Unknown Venue
EngineeringHardware Verification LanguagePower Optimization (Eda)Architectural EngineeringUpf SpecificationsVerificationArchitectural Power IntentComputer ArchitectureComputer-aided VerificationSoftware EngineeringSoftware AnalysisFormal VerificationHardware SecuritySystems EngineeringIndividual DomainsFormal SpecificationRuntime VerificationFormal ModelingComputer EngineeringComputer ScienceIndividual Power DomainsSoftware DesignArchitectural DesignUpf-extracted AssertionsArchitecture AnalysisSmart GridProgram AnalysisAutomated ReasoningFormal MethodsFunctional Verification
Recent research has indicated ways of using UPF specifications for extracting valid low-level control sequences to express the transitions between the power states of individual domains. Today there is a disconnect between the high-level architectural power management strategy which relates multiple power domains and these low-level assertions for controlling individual power domains. In this paper we attempt to bridge this disconnect by leveraging the low-level per-domain assertions for translating architectural power intent properties into global assertions over low-level signals. We show that the inter-domain properties created in this manner can be formally verified over the global power management logic.
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