A 10Gb/s CMOS CDR and DEMUX IC with a Quarter-Rate Linear Phase Detector

Abstract

A 10Gb/s CDR and DEMUX IC in a 0.13μm CMOS consumes 100mA from a 1.2V core supply and 205mA from a 2.5V I/O supply including 18 LVDS drivers. The CDR system uses a quarter-rate linear phase detector and a 4-phase 2.5GHz LC-QVCO to achieve a BER of <10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-15</sup> and a jitter tolerance of 0.5UI <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> exceeding the OC-192 standard