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A 50–300-MHz Highly Linear and Low-Noise CMOS $Gm{\hbox{-}}C$ Filter Adopting Multiple Gated Transistors for Digital TV Tuner ICs
44
Citations
21
References
2009
Year
Low Noise CmosMixed-signal Integrated CircuitAnalog Design50–300-Mhz Highly LinearFilter DesignDigital FilterDigital Circuit DesignLow-noise CmosMicroelectronicsLow-pass FilterLinearity PerformanceAnalog-to-digital Converter
In this paper, a highly linear and low noise CMOS active tracking low-pass filter is presented to overcome a local oscillator harmonic mixing problem for Advanced Television Systems Committee terrestrial and cable digital TV tuner integrated circuits. A transconductor linearization technique based on a method of multiple gated transistors is adopted to improve the linearity performance. The cutoff frequency of the proposed filter is tunable from 50 to 300 MHz. Fabricated in a 0.18-mum CMOS process, the filter provides a minimum input referred noise density of 5 nV/radic(Hz) and maximum in-band output referred third-order intercept point of 16.9 dBm, while drawing an average current of 40 mA from 1.8 V. The total chip area is 1 mm times 0.9 mm.
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