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Grain boundary and dislocation effects on the PV performance of high-purity silicon
11
Citations
7
References
2002
Year
Unknown Venue
EngineeringHigh-purity SiliconPhotovoltaic SystemSilicon On InsulatorGrain SizePhotovoltaicsSemiconductorsPv PerformanceDislocation DefectsMaterials EngineeringMaterials ScienceElectrical EngineeringSemiconductor TechnologyCrystalline DefectsDefect FormationSemiconductor Device FabricationSitu IngotMicroelectronicsMicrostructureSilicon DebuggingDislocation InteractionApplied PhysicsDislocation EffectsSolar Cell Materials
To quantify the effects of grain size and dislocation defects on the minority charge carrier lifetime /spl tau/ and photovoltaic (PV) efficiency of silicon, the authors grew high-purity, float-zoned (FZ) ingots with a range of grain sizes from single crystalline (dislocated and dislocation-free) down to 4/spl times/10/sup -4/ cm/sup 2/. In situ ingot cooling rates of 18/spl deg/ and 89/spl deg/C min/sup -1/ were used. Bulk ingot /spl tau/ ranged from less than 30 /spl mu/s for the multicrystalline ingots to 2,500 /spl mu/s for the dislocation-free crystals. Wafers from different positions in the ingots were used for /spl tau/ measurements and the fabrication of mesa-isolated, 0.04-cm/sup 2/ diagnostic PV device structures. They found that /spl tau/ decreased to 4 /spl mu/s and normalized solar cell efficiency decreased to 0.6 for the smallest average grain areas (4/spl times/10/sup -4/ cm/sup 2/).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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