IEEE Transactions on Circuits & Systems II Express Briefs · 2010 · 12 citations · 13 references
EngineeringComputer EngineeringComputer ScienceAnalog ElectronicsLow-power DesignTheory Of ComputationChinese Remainder TheoremDigital Integrated Circuit DesignDigital Signal ProcessingFourier AnalysisFpga ArchitectureChinese Remainder Theorem AlgorithmsComputational Complexity Of AlgorithmsDigital Signal Processing BlocksDiscrete Fourier TransformHardware ResourcesMemory ArchitectureRead-only MemoryVery-large-scale Integration
A low-computational complexity and low-cost recursive discrete Fourier transform (RDFT) design using the Chinese remainder theorem is proposed in this brief. The proposed algorithm reduces multiplications by 74% and additions by 73% compared to the latest RDFT algorithms. For computing the 212- and 106-point DFT coefficients, the proposed design can shorten computing cycles by 47% compared with the latest architectures. The hardware resources for the proposed design only require 2 multipliers and 12 adders. The coefficient read-only memory storing the sine and cosine values can be reduced by 100% compared with other recursive algorithms. Therefore, the proposed algorithm is more suitable than other very large scale integration realizations.
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Manfred R. Schroeder · IEEE Potentials · 1989 · 104 citations
Shin-Chi Lai, Sheau-Fang Lei, Chia-Lin Chang et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2009 · 34 citations