1 MHz sinusoidal gate driver for Class DE inverter operating with variable load and frequency

Abstract

The subject of this paper is the refinement of a sinusoidal gate driver (SGD). This driver is devoted to the Class DE inverter as the driver of MOSFETs. The load of the inverter has variable parameters. In order to ensure the optimum mode of operation of the Class DE inverter, its switching frequency and relevant commutation angle are automatically adjusted as the load parameters change. The SGD driver is based on the Class D inverter. The driver and the inverter operate in a frequency range of 1 MHz. The PLL system, together with a relevant delay and a properly shaped amplitude-frequency characteristic of the driver's output voltage, maintain the optimum mode of the Class DE inverter. The SGD driver has been built and tested. This paper contains a short description of the Class DE inverter and the optimum conditions for its operation. Next, the concept behind the operation of the driver is presented. Then, technical data for the laboratory driver and the Class DE inverter are described. An example of measured waveforms and a photograph of the laboratory system are presented. Finally, the design considerations are given.