High voltage SOI CMOS IC technology for driving plasma display panels

Abstract

We have developed a new high voltage CMOS (HV-CMOS) IC technology by using 5 /spl mu/m-thick SOI. In this technology, trench isolation and a 0.5 /spl mu/m rule CMOS process are also adopted. We have examined seven series HV-CMOS fabrication processes in different voltage ratings (in which the maximum voltage rating was 250 V) and optimized their characteristics respectively. The HV-CMOS IC with full-CMOS type level shifter is suited to low power consumption color plasma display panels (C-PDPs) and high-speed switching has been confirmed. The chip size of the developed PDP scan driver IC could be reduced by 40% compared with the conventional chip.