Voltage references for ultra-low supply voltages

Abstract

The majority of integrated voltage references have, so far, been limited to a minimum supply voltage above 0.7-V often due to the voltage headroom required for the forward-biased operation of a PN-junction. This paper reviews design techniques for low voltage reference design and explores the feasibility of designing a voltage reference with a supply voltage below 0.7-V in a standard CMOS process. Two ultra-low-voltage solutions are explored in detail, a reference circuit based on CMOS compatible Schottky diodes and a MOS-only reference circuit.