A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input

Abstract

The design of a passive sigma-delta modulator without using operational amplifiers is presented. Issues of its application to IF digitization with subsampling scheme are discussed. In addition, a switch-only gain-boost network is proposed to achieve a dc voltage gain in a passive way. The prototype chip of a second-order passive sigma-delta modulator was fabricated in a 1.2-/spl mu/m CMOS process. Testing results showed that with a 10-MHz IF input (bandwidth of 20 kHz), the modulator achieved a 13-b resolution at 0.25 mW with a 3.3 V power supply. Good performance was also measured with a baseband input.