RF noise characterization of MOS devices for LNA design using a physical-based quasi-3-D approach

Abstract

A quasi-3-D method for microwave noise simulation of MOSFET is presented in this paper. This method inherently takes into account all the microscopic noise sources within the transistor at microwave frequencies. It is realized by properly transforming the 2-D noise sources to 3-D equivalent noise sources. The 2-D noise sources and their correlation term are calculated in the framework of a PDE based 2-D device simulator. Based on 3-D equivalent noise network, the four noise parameters F/sub min/, R/sub n/, R/sub opt/, and X/sub opt/ which are critical for low noise device design are calculated. A 0.5 -/spl mu/m LDD nMOS transistor was simulated and the simulation results were compared to measurement data. The functional behavior of the four noise parameters at microwave frequency with bias and layout parameters is illustrated. An example for designing a low noise MOSFET for RF application is provided.