ESD protection design for RF integrated circuits: new challenges

Abstract

The challenge in RF ESD protection circuit design, still a problem in definition, is to address the complex interactions between the ESD protection network and the circuit being protected in both directions. This paper discusses related key factors, e.g., switching and accidental triggering of ESD protection networks, as well as ESD-induced parasitic capacitive, resistive, noise coupling and self-generated noise effects. Evaluation techniques include S-parameter, Q-factor and overall specification examination. Low-parasitic compact structures are the solutions to RF ESD protection.