Publication | Closed Access
Design of fixed-point iterative decoders for concatenated codes with interleavers
89
Citations
17
References
2001
Year
EngineeringComputer ArchitectureIterative DecodingFixed-point Iterative DecodersHardware SecurityJoint Source-channel CodingIterative Decoding AlgorithmParallel ComputingCoding TheoryTurbo CodesVariable-length CodeComputer EngineeringComputer ScienceError Correction CodeQuantization (Signal Processing)Siso OperationSignal ProcessingParallel ProgrammingSoft Demodulator
We discuss the effects of quantization on the performance of the iterative decoding algorithm of concatenated codes with interleavers. Quantization refers here to the log-likelihood ratios coming from the soft demodulator and to the extrinsic information passed from one stage of the decoder to the next. We discuss the cases of a single soft-input soft-output (SISO) module, in its additive log-likelihood version (L-SISO), performing sequentially all iterations (an implementation solution coping with medium-low data rate as compared with the hardware clock), and that of a pipelined structure in which a dedicated hardware is in charge of each SISO operation (an implementation suitable for high data rates). We give design rules in both cases, and show that a suitable rescaling of the extrinsic information yields almost ideal performance with the same number of bits (five) representing both log-likelihood ratios and extrinsic information at any decoder stage.
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