Temporal isolation on multiprocessing architectures

Abstract

Multiprocessing architectures provide hardware for executing multiple tasks simultaneously via techniques such as simultaneous multithreading and symmetric multiprocessing. The problem addressed by this paper is that even when tasks that are executing concurrently do not communicate, they may interfere by affecting each others' timing. For cyber-physical system applications, such interference can nullify many of the advantages offered by parallel hardware and can enormously complicate synthesis of software from models. This paper examines what changes need to be made at lower levels of abstraction to support temporal isolation for effective software synthesis. We discuss techniques at the microarchitecture level, in the memory hierarchy, in on-chip communication, and in the instruction-set architecture that can facilitate temporal isolation.