High performance Pch-LDMOS transistors in wide range voltage from 35V to 200V SOI LDMOS platform technology

Abstract

We have developed high performance Pch-LDMOS transistors in wide range rated voltage from 35V to 200V SOI LDMOS platform technology. By applying a novel channel structure, a high saturation drain current of 172 μA/μm in the 200V Pch-LDMOS transistor was achieved, which is comparable to that of the Nch-LDMOS transistor. A low on-resistance of 3470 mΩ*mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> was obtained while maintaining high on- and off-state breakdown voltages of -240 and -284 V. The 35V to 200V LDMOS transistors with a competitive low on-resistance were also demonstrated by layout optimization such as RESURF structure and field plate.