Analog fault diagnosis based on ramping power supply current signature clusters

Abstract

Measurement of power supply currents was found to be very useful for testing CMOS IC's because of its potential to detect a large class of manufacturing defects. However, this technique was used mainly for fault detection and was confined to digital circuits. In this paper, we present a suited methodology for fault diagnosis of analog circuits based on the observation of power supply currents. In the proposed technique, fault signature dictionaries are generated from the currents in the power supply bus. To obtain signatures rich in information for efficient diagnosis, the transistors in the circuit are forced to operate in all possible regions of operation by using a ramp signal at the supply instead of the conventional constant DC signal or ground voltage. The signatures are then clustered into different groups using a Kohonen neural network classifier. This technique has the potential to detect and diagnose single and multiple shorts as well as open circuits. The theoretical and experimental results of the proposed technique are verified using a CMOS Operational Transconductance Amplifier (OTA) circuit.