IEEE Journal of Solid-State Circuits · 1998 · 80 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsMicrowave EngineeringCmos Circuit DesignDevice CharacterizationIntegrated Circuit DesignMixed-signal Integrated Circuit DesignTiming AnalysisTiming ModelingCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Radio-frequency CircuitsMixersRf Cmos DesignSignalsTime Resolution
A number of recently reported CMOS line receivers and downconversion mixers are based on sampling. A key component in these designs is the NMOS sampling switch. It can sample a very high bandwidth signal, several GHz for a 0.8-/spl mu/m transistor. We present an expression for the aperture time for an NMOS switch when the input has low swing. The switch can, under this condition, be modeled as a device that determines a weighted average over time of the input signal. The weight function is derived. The aperture time function shows that the maximum theoretical time resolution for a switch in 0.8-/spl mu/m standard CMOS is 21 ps (/spl sim/48 Gb/s). SPICE simulations agree with the theory. Transient two-dimensional (2-D) device simulations do not contradict the predicted results. Experiments on a switch made in a 0.8-/spl mu/m standard CMOS process show successful sampling of every thirty second bit of a 5-Gb/s data stream.
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Fundamentals of MOS Digital Integrated Circuits
Integration · 1989 · 116 citations
Engineering, Computer Engineering, Electrical Engineering +12
A Highly Linear 1-GHz CMOS Downconversion Mixer
Peter Chan, A. Rofougaran, Karim Ali et al. · European Solid-State Circuits Conference · 1993 · 80 citations
C. Schiller, P. F. Byrne · IEEE Journal of Solid-State Circuits · 1991 · 29 citations
Engineering, Computer Engineering, Electrical Engineering +17