2011 · 10 citations · 6 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicrowave EngineeringCmos Circuit DesignMultistage AmplifiersSignal AmplificationFrequency CompensationGain-bandwidth ProductHigh-frequency Amplifier DesignPhase MarginSlew RateTwo-stage Amplifier Design
This paper presents a high-gain wide-bandwidth two-stage amplifier. By adopting the recycling folded cascode input-stage, a damping-factor-control frequency compensation (DFC) and a feedforward stage, the designed two-stage amplifier achieves well performance such as the gain-bandwidth product (GWB) and the slew rate (SR). The two-stage amplifier has been designed in a standard 0.5µm CMOS process and is simulated using a 3-V power supply and a 25-kΩ//100-pF load. Simulation results show that the designed two-stage amplifier achieved a DC gain of about 100dB, GWB of 26.6MHz with 60.1° phase margin and SR+/SR−=24.4/13.35-V/µs.
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