2005 · 12 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureParallel ComputingSystem-on-chip DesignAccelerator ArchitectureFpga ArchitectureHardware AccelerationNetwork-on-chip DesignParallel ArchitecturesParallel Computer ArchitectureBlock Cipher DesignCipher Block ChainingCryptographic AccelerationCryptographic Accelerator DesignCryptographic AcceleratorsData Encryption ArchitectureHardware Acceleration For Cryptography
This paper presents a DES/3DES core that will support cipher block chaining (CBC) and also has a built in keygen that together take up about 10% of the resources in a Xilinx Virtex II 1000-4. The core will achieve up to 200Mbit/s of encryption or decryption. Also presented is a network architecture that will allow these CBC capable 3DES cores to perform their processing in parallel.
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