Publication | Closed Access
Fast Multivariate Signature Generation in Hardware: The Case of Rainbow
16
Citations
4
References
2008
Year
Unknown Venue
Cryptographic PrimitiveEngineeringHardware Verification LanguageEvolvable HardwareHardware AlgorithmComputer ArchitectureSystem-level DesignHardware SystemsFormal VerificationHardware SecurityDigital SignatureHigh-performance ArchitectureComputing SystemsLinear Transformation OperationsParallel ComputingComputer EngineeringComputer ScienceFpga DesignCryptographyClock CyclesHardware EmulationMultivariate Signature SchemeFormal MethodsParallel Programming
This paper deals with the design of an area-time efficient hardware architecture for the multivariate signature scheme, Rainbow. As a part of this architecture, a high-performance hardware optimized variant of the well-known Gaussian elimination over GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">l</sup> ) and its efficient implementation is presented. Besides solving LSEs, the architecture is also re-used for the linear transformation operations of the scheme, thereby saving on area. The resulting signature generation core of Rainbow requires 63,593 gate equivalents and signs a message in just 804 clock cycles. A comparison of our architecture with implementations of the RSA, the ECDSA and the en-TTS scheme shows that Rainbow in hardware provides significant performance improvements.
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