A Universal UHF RFID Reader IC in 0.18-µm CMOS Technology

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A highly integrated UHF RFID reader IC in 0.18-<formula formulatype="inline"> <tex>$\mu$</tex></formula>m CMOS process covering the entire 860 MHz to 960 MHz RFID band supporting the EPCglobal™ Class-1 Generation-2 and ISO-18000-6A/B/C standards is presented. The IC features a transmitter with an output of <formula formulatype="inline"><tex>$+$</tex></formula>10 dBm and a receiver with sensitivity of <formula formulatype="inline"><tex>$-$</tex></formula>96 dBm in listen-before-talk mode (LBT) and <formula formulatype="inline"><tex>$-$</tex></formula>85 dBm in talk-mode. Direct-conversion architecture is used for the receiver for a high level of integration and low power consumption. On-chip dual-loop synthesizer generates high-purity LO signal with frequency resolution of 50 kHz and phase noise of <formula formulatype="inline"><tex>$-$</tex></formula>101 dBc/Hz at 100 kHz offset over the entire 860 to 960 MHz band. The IC integrates 10-bit DACs, pulse-shaping filters, an IQ modulator and a power amplifier in the transmit chain and a low-noise amplifier (LNA), an IQ downconverter, channel-select filters, variable-gain amplifiers and 10-bit ADCs in the receive chain. On-chip ASK demodulator provides demodulated I and Q raw data outputs. The chip has a die area of 6 mm <formula formulatype="inline"><tex>$\times$</tex> </formula> 6 mm. It operates over a wide range of voltage and temperature, from 1.6 V to 2.0 V and from <formula formulatype="inline"> <tex>$-{\hbox{25}}\,^{\circ}$</tex></formula>C to <formula formulatype="inline"> <tex>$+{\hbox{75}}\,^{\circ}$</tex></formula>C and consumes 540 mW from a 1.8 V supply at <formula formulatype="inline"><tex>$+{\hbox{25}}\,^{\circ}$</tex> </formula>C. </para>