A 60GHz digitally controlled RF-beamforming receiver front-end in 65nm CMOS

Abstract

Phased arrays form a crucial step towards high data rate 60 GHz wireless communication. This paper presents a fully integrated digitally controlled 60 GHz RF-beamforming receiver front-end in CMOS. Using digitally controlled active phase shifters, each path of the scalable architecture achieves 10 dB power gain, 7.2 dB noise figure, a 360deg phase shift range in 22.5deg steps at 61 GHz, and a 3 dB-bandwidth of 5.4 GHz, while only dissipating 78 mW in each path. Chip area is 1.6 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .